awesome mips performance

[Jason A. Donenfeld]

Hey guys,

The latest snapshot is broken on big endian. This commit [1] fixes it,
and will be released in the next snapshot shortly. Sorry about that.
Lots of churn with the siphash implementation.

With the recent changes to add alignment in the headers, I now get 60
megabits per second on a super crappy TL-WR841N board (QCA9533)
transmitting over the internet. This is awesome performance -- a good
milestone for little CPUs.

Jason

[1] https://git.zx2c4.com/WireGuard/commit/?id=094e95e736723075d586d7a006c5525f2e3a74d4